With development of ferroelectric materials, the idea of applying a ferroelectric field effect transistor (FeFET) to a dynamic random-access memory has been proposed in some references, e.g. in U.S. Pat. No. 6,067,244. However, there are many drawbacks in the techniques addressed by the references. One of the drawbacks is that it is difficult to synthesize a ferroelectric material and a Si substrate. Furthermore, some ferroelectric materials also require thicker ferroelectric layers (e.g. larger than 200 nm) for enabling desired characteristics. Therefore, it is very hard for current techniques to scale down FeFETs, fabrication processes of the FeFETs are also difficult, and cost of the FeFETs is high. Although ferroelectric materials doped with hafnium dioxide (HfO2) is proposed to scale down the FeFETs in recent references, the HfO2 concentration is extremely low (about 3-5%), and it is difficult to control the doping uniformity across a wafer.
Moreover, many problems still exist in application of FeFETs. For example, the data stored in a FeFET may be easily affected when the FeFET is biased with one half of a programming voltage Vpp (the programming voltage Vpp represents the voltage required for programming a memory cell). One current solution is proposed as follows. During program operation (e.g. write “1”), unselected memory cells connected to the selected word line (WL) or the selected bit line (BL) are biased to ⅔ Vpp, and other unselected word lines are biased to ⅓ Vpp. During erase operation (e.g. write “0”), unselected memory cells connected to the selected word line or the selected bit line are biased with ⅓ Vpp, and other unselected word lines are biased to ⅔ Vpp. This method can reduce possibility of affecting the data stored in the memory cells.
Therefore, in summary, drawbacks still exist in the current techniques. To the area of ferroelectric technology, a new ferroelectric memory structure and the operation method thereof become objects which all parties are actively studying.